News - The latest happenings in the memory arena

IBM, Micron to build hybrid memory with TSVs

December 9, 2011

Micron Technology Inc's hybrid memory cube (HMC) will become the first commercial CMOS manufacturing technology to employee IBM Corp.'s through-silicon via (TSV) process, the companies said Thursday (Dec. 1).

IEDM: SuVolta transistor operates down to 0.4-V

December 9, 2011

Startup SuVolta Inc has announced that its novel transistor technology, dubbed PowerShrink, operates down to 0.425-V, approximately 300-mV below conventional processes. PowerShrink is based on a DDC (deeply depleted channel) transistor manufactured in epitixially grown doped silicon on the surface of a conventional bulk CMOS wafer.

Lattice picks up SiliconBlue for $62 million

December 9, 2011

Lattice bids its way into significant FPGA presence with $62 million offer for SiliconBlue.

Chipmakers losing billions on DRAM as iPad dominates

December 1, 2011

Did you know that Apple ships more iPads than Dell ships PCs? Chipmakers that have bet their business on the global demand for DRAM chips know this and it's freaking them out.

Microchip Expands Stand-Alone Real-Time Clock/Calendar Device Family

November 16, 2011

New, Battery-Backed RTCC Devices Include Faster, 10 MHz SPI Interface, Watchdog Timer, Event Detects and More Memory at 10k-Unit Price of $1.18

Toshiba Develops Circuit Techniques for Embedded SRAM Operating at 0.5V-1.0V

November 15, 2011

57%[1] less power consumption and cell failure rate reduced to 1/100

SMART Modular Technologies Releases 32GB VLP DDR3 RDIMM

November 15, 2011

Operating at Data Rates up to PC3-10600, SMART Modular's CoolFlex VLP RDIMM Products Use Off-the-Shelf DDR3 DRAM to Reduce Cost

Microchip Launches Training Series

November 14, 2011

Microchip Technology Inc., a leading provider of microcontroller, analog and Flash-IP solutions, today announced a worldwide series of technical training seminars—beginning in January—that will show designers how to easily adapt to changing product requirements by migrating a real-world application from 8, to 16, to 32-bit PIC® microcontrollers (MCUs).

DRAM Growth Decelerates As Mobile Shift Continues, Analysts Say

November 9, 2011

The growth of dynamic random access memory (DRAM) content in PCs is decelerating due to rising demand for Ultrabooks and cloud computing, according to a report from industry analyst IHS iSuppli.

Advanced Dual-Interface Memory From STMicroelectronics Uses Energy Harvesting to Enable True Battery-Free System Design

November 4, 2011

Dual-interface memory family adds 16-Kbit device capable of powering small systems entirely from harvested RF power with no battery required

Featured Resources

- Events, papers, guides and more

PRODUCT GUIDE: Serial SRAM Memory Family

Microchip’s new serial SRAM family provides a way to easily and inexpensively add external RAM to almost any application. These serial devices use less power and fewer I/O connections than traditional parallel SRAM. And, they allow designers to use a smaller microcontroller rather than moving to a larger microcontroller just to get more on-board RAM.

PRODUCT GUIDE: SPI-Compatible Serial SRAM Devices

Microchip’s new serial SRAM family provides a way to easily and inexpensively add external RAM to almost any application. These serial devices use less power and fewer I/O connections than traditional parallel SRAM. Also, they allow designers to use a smaller microcontroller rather than moving to a larger microcontroller just to get more on-board RAM.

PRODUCT GUIDE: SST Serial and Parallel Flash Memory

Microchip's SST Serial and Parallel Flash Memory features products with high performance, superior reliability and low power consumption.

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Featured Video

Introduction to the UNIO EEPROM Family Part 1 of 2
When small size or I/O resources on the microcontroller are a concern and non-volatile memory is required, the UNI/O EEPROM Family is another option. This seminar begins with a brief overview of the serial buses used in today's mainstream EEPROMs, followed by a comparison of the new UNI/O Bus protocol. Since this new bus only uses a single I/O port for communication, it gives engineers another option for miniaturization and lower system costs. As the seminar progresses, the main features of this new memory are shown along with the advanced features never before seen in a single EEPROM device. Finally, there is a discussion on an easy way to evaluate UNI/O EEPROMs using existing customer hardware and Microchip's software drivers.

Featured Datasheets

PRODUCT GUIDE: UNI/O® Serial EEPROMs: Single I/O Bus Interface

The UNI/O® serial EEPROM is a SINGLE I/O EEPROM device that has been developed by Microchip Technology Inc. The EEPROM has been developed to work on the UNI/O® Bus, a propriety single I/O bus protocol, also developed by Microchip Technology Inc. The Bus combines the clock and data lines into a single bit stream using the Manchester Encoding technique. This single I/O EEPROM family has the advantage of using just ONE MCU I/O pin as opposed to at least 4 MCU I/O’s needed by the SPI, 4 I/O’s by the Microwire and at least 2 I/O’s by the I2C.