Blog Posts - Opinions and observations from the Professor

The Next Memory Battle

By Professor Memory March 1, 2010

The New York Times posted an interesting article (For Chip Makers, the Next Battle Is in Smartphones) last week that follows the theme of my earlier blogs.

In a recent Professor Memory post, a challenge was made to identify a single specific application for a particular new memory technology. Under the assumption that the future market will contain a decreased emphasis on the desktop PC product concept of the past, and an increased emphasis on mobile applications, below are several possibilities.

Makimoto’s Wave

By Professor Memory February 16, 2010

In response to a question to name a specific application for a particular memory technology, I responded that the value proposition of any technology is related to the specific end application and that therefore the market scenario had to be first identified.

Micron Acquires Numonyx

By Professor Memory February 11, 2010

This transfer of Numonyx to Micron is an excellent opportunity for all parties for several reasons.
The support of STMicroelectronics and Intel was the best that could have possibly been provided to Numonyx’ PCM during the critical R/D phase. Deep pockets of funding combined with the technical depth of Intel and STMicro would be the ideal incubator for any emerging technology. It’s hard to believe that PCM would be anywhere near this level of development in any other set of circumstances.

SiP and SoC - Part 2

By Professor Memory February 2, 2010

The market entry point of new memory technologies depends on how far the industry transitions away from the desktop PC model that so successfully drove DRAM into high volume. Here are three Intel-related recent examples that lead me to believe such a transition is well under way. Presenting the events in reverse chronological order makes for more dramatic story telling, but these events are essentially all taking place at the same time relative to the bigger time scale of semiconductor progress.

NAND versus Future Memory Technologies

By Professor Memory February 2, 2010

Thank you for the comments to my last blog. To clarify, I believe we are talking about two different topics spread over two different periods, and I would divide the question into the market conditions of today and those of the near future. In the market conditions of today, the issue is the transition from NAND to any of the emerging nonvolatile memory technologies.

Webcast: Phase Change Memory Reliability Compared to Today’s Flash Memory

By Professor Memory January 27, 2010

Watch our latest on-demand webcast titled "Phase Change Memory Reliability Compared to Today’s Flash Memory". The discussion, led by Cliff Smith, Phase Change Memory Market Development Manager at Numonyx and Bob Merritt, Co-Founder and Partner at Convergent Semiconductors, focusses on the reliability comparisons of this new Phase Change Memory versus today’s flash memory technologies. The webcast includes an in depth question and answer session with the live viewers. Registration is free.

SiP and SoC - Part 1

By Professor Memory January 27, 2010

Thanks for your comments on my recent blog post regarding advanced packaging technologies relative to emerging memory technologies. One point of view accurately described technical issues that still remain for advanced packaging technologies. Another perspective called attention to the fact that the upcoming International Interconnect Technology Conference has added a session focused on interconnection solutions for alternative memory technologies. There is clearly a lot of work to be done to broaden the base of advanced packaging technologies, and other sites and blogs are closely following that progress.

VIA to Emerging Memory Technologies

By Professor Memory January 21, 2010

Intel recently commented that it is still exploring the future use of 3D devices based on through-silicon VIAs (TSVs), but that the company has still not found the right application or “product intercept” for the technology to justify the development and manufacturing costs.

MRAM RAID

By Professor Memory January 13, 2010

Everspin starts off the New Year with another MRAM product announcement. The company announced a 1Mb dual-supply MRAM product designed to “directly interface with next-generation logic products requiring low voltage I/O’s. RAID systems using advanced logic controllers operating with 1.8 volt I/O’s will be able to seamlessly interface with MRAM to take advantage of its unique features.

Featured Resources

- Events, papers, guides and more

PRODUCT GUIDE: Serial SRAM Memory Family

Microchip’s new serial SRAM family provides a way to easily and inexpensively add external RAM to almost any application. These serial devices use less power and fewer I/O connections than traditional parallel SRAM. And, they allow designers to use a smaller microcontroller rather than moving to a larger microcontroller just to get more on-board RAM.

PRODUCT GUIDE: SPI-Compatible Serial SRAM Devices

Microchip’s new serial SRAM family provides a way to easily and inexpensively add external RAM to almost any application. These serial devices use less power and fewer I/O connections than traditional parallel SRAM. Also, they allow designers to use a smaller microcontroller rather than moving to a larger microcontroller just to get more on-board RAM.

PRODUCT GUIDE: SST Serial and Parallel Flash Memory

Microchip's SST Serial and Parallel Flash Memory features products with high performance, superior reliability and low power consumption.

+ view all resources

Featured Video

Introduction to the UNIO EEPROM Family Part 1 of 2
When small size or I/O resources on the microcontroller are a concern and non-volatile memory is required, the UNI/O EEPROM Family is another option. This seminar begins with a brief overview of the serial buses used in today's mainstream EEPROMs, followed by a comparison of the new UNI/O Bus protocol. Since this new bus only uses a single I/O port for communication, it gives engineers another option for miniaturization and lower system costs. As the seminar progresses, the main features of this new memory are shown along with the advanced features never before seen in a single EEPROM device. Finally, there is a discussion on an easy way to evaluate UNI/O EEPROMs using existing customer hardware and Microchip's software drivers.

Featured Datasheets

PRODUCT GUIDE: UNI/O® Serial EEPROMs: Single I/O Bus Interface

The UNI/O® serial EEPROM is a SINGLE I/O EEPROM device that has been developed by Microchip Technology Inc. The EEPROM has been developed to work on the UNI/O® Bus, a propriety single I/O bus protocol, also developed by Microchip Technology Inc. The Bus combines the clock and data lines into a single bit stream using the Manchester Encoding technique. This single I/O EEPROM family has the advantage of using just ONE MCU I/O pin as opposed to at least 4 MCU I/O’s needed by the SPI, 4 I/O’s by the Microwire and at least 2 I/O’s by the I2C.