New Memory Technology Market Share? Under 5% in five years is my guess.
For the past many years, the industry has ‘seen the end coming for the traditional NVM scaling roadmap’, and has been hyping and exploring alternative technologies that will replace floating gate NAND, which are now estimated to ‘….surely face a hard stop in scaling at about 15nm.’
This is today and always has been a moving (receding, in fact) target. Back when the industry was at 90 or 70nm, few would have been willing to say with confidence that we’d be in production at 20nm today. But every NAND maker is either in early production or has shown capabilities that they would be soon. All NAND makers seem to have two process nodes in the ‘teens mapped out, called 1Xnm and 1Ynm. These will take them into volume production, using the traditional technology roadmap, out to about 2015. By then, who knows? But if history is a guide, they will find ways to further extend traditional technologies for 1-2 more nodes.
Historically, that is the way it is with semiconductors and memories especially. Hard Stops dissipate like the morning dew when the sun comes up. The ‘memory industry’ spends close to $10B per year on extending the inertial roadmap, which is orders of magnitude greater than is spent on New Memory technologies. One has only to look at how software-enabled MLC is now ‘good enough’ compared to SLC to make its way into almost all applications. Three-bit NAND is following down the same path, and three-bit cells do not have to be discount priced nearly as much as formerly, to make them competitive against 2MLC. Manufacturers learn about the technology, devise work-arounds and solutions, the market adapts and, Voila!, another plateau is reached and technology is mastered. Life goes on.
Companies like Sandforce and Anobit become experts, and build companies based on their understanding of the silicon and finding solutions to make bad bits good, get good performance out of so-so material. Wear leveling, ECC, improved sensing all increase endurance, performance and the industry’s ability to tell a 1000 from a 0100.
To say nothing of market acceptance of new technologies, which ALL face hard sells with someone who is betting his company on something that is relatively unproven (which proof itself takes a long time).
All the while, ReRam, PCM, FeRAM, MRAM,T-RAM, Z-RAM, and CMOx are hard at work on their own problems. But, as an industry veteran, I am not holding my breath…either for one of the new technologies to get a firm foothold in the marketplace, or for the traditional NVM technology roadmap to run into a truly hard stop.
Sure, it cannot go on forever. And it will not, but my guess for the share of the NVM marketplace (what we are calling flash today) that is held by these newer technologies, those which are substantially different in approach from ‘flash’, will still be less that 5% five years down the road.
Featured Video
Introduction to the UNIO EEPROM Family Part 1 of 2
When small size or I/O resources on the microcontroller are a concern and non-volatile memory is required, the UNI/O EEPROM Family is another option. This seminar begins with a brief overview of the serial buses used in today's mainstream EEPROMs, followed by a comparison of the new UNI/O Bus protocol. Since this new bus only uses a single I/O port for communication, it gives engineers another option for miniaturization and lower system costs. As the seminar progresses, the main features of this new memory are shown along with the advanced features never before seen in a single EEPROM device. Finally, there is a discussion on an easy way to evaluate UNI/O EEPROMs using existing customer hardware and Microchip's software drivers.
Manufacturers learn about the
Manufacturers learn about the technology, devise work-arounds and solutions, the market adapts and, Voila!, another plateau is reached and technology is mastered. Great.
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